Chapter 3 — Kirchhoff's Laws and Circuit Topology

Chapter Overview (click to expand)

This chapter introduces Kirchhoff's Voltage Law (KVL) and Kirchhoff's Current Law (KCL), the two fundamental conservation laws that govern all electrical circuits. Published by Gustav Kirchhoff in 1845, these laws provide the mathematical framework needed to analyze circuits of any complexity. While Ohm's Law describes the behavior of individual components, Kirchhoff's Laws describe what happens at connections — where currents meet at nodes and voltages distribute around loops. Combined with systematic methods, these laws make it possible to solve any linear DC circuit. The chapter covers circuit topology concepts including nodes, branches, loops, and meshes, then develops two powerful systematic techniques: the node voltage method and the mesh current method. Special cases involving supernodes and supermeshes are addressed, along with the superposition principle for multi-source circuits. The chapter concludes with delta-wye transformations and circuit simplification strategies. **Key Takeaways** 1. Kirchhoff's Current Law (KCL) enforces conservation of charge at every node, and Kirchhoff's Voltage Law (KVL) enforces conservation of energy around every closed loop. 2. The node voltage method and mesh current method provide systematic procedures that can solve any linear circuit, with the choice between them depending on circuit topology. 3. Delta-wye transformations convert between equivalent resistor configurations, enabling simplification of circuits that cannot be reduced by series and parallel rules alone.

Summary

This chapter introduces Kirchhoff's Voltage Law (KVL) and Kirchhoff's Current Law (KCL), the two fundamental conservation laws that govern all electrical circuits. Students will learn about circuit topology concepts including loops, meshes, and the systematic methods for analyzing complex circuits. The chapter covers node voltage and mesh current methods, including techniques for handling special cases like supernodes and supermeshes. By the end of this chapter, students will have the tools to systematically analyze any DC circuit using matrix-based techniques.

Concepts Covered

Kirchhoff's Voltage Law
Kirchhoff's Current Law
Loop
Mesh
Circuit Topology
Node Voltage Method
Reference Node
Supernode
Mesh Current Method
Supermesh
Superposition Principle
Load Resistance
Equivalent Resistance
Delta Configuration
Wye Configuration
Delta-Wye Transformation
Circuit Simplification

Prerequisites

Before beginning this chapter, students should have:

Understanding of electric charge, voltage, current, power, and resistance (Chapter 1)
Mastery of Ohm's Law, series and parallel circuits, and voltage/current dividers (Chapter 2)
Familiarity with circuit schematic symbols and conventions

3.1 Kirchhoff's Current Law (KCL)

Kirchhoff's Current Law is a direct consequence of the conservation of electric charge. It states that the algebraic sum of all currents entering and leaving any node in a circuit must equal zero. Every coulomb of charge that arrives at a node must also depart — charge cannot accumulate at a junction.

\[\sum_{k=1}^{n} i_k = 0\]

Equivalently, the total current flowing into a node equals the total current flowing out. By convention, currents entering a node are assigned positive signs and currents leaving are assigned negative signs. Consistent application of this sign convention ensures correct results.

Diagram: KCL Node Visualization

Applying KCL

Example — KCL at a Three-Wire Node

Consider a node where three wires meet. If \(I_1 = 5\) A flows in and \(I_2 = 3\) A flows in, determine the current through the third wire.

By KCL: \(I_1 + I_2 + I_3 = 0\)

Defining currents entering as positive: \(5 + 3 + I_3 = 0\)

Therefore: \(I_3 = -8\) A — the negative sign indicates current flows out of the node.

Current	Direction	Value
\(I_1\)	Into node	+5 A
\(I_2\)	Into node	+3 A
\(I_3\)	Out of node	−8 A
Sum	—	0 A

3.2 Kirchhoff's Voltage Law (KVL)

Kirchhoff's Voltage Law is a consequence of conservation of energy. It states that the algebraic sum of all voltages around any closed loop in a circuit must equal zero. When traversing a closed path, voltage rises from sources are exactly balanced by voltage drops across resistive elements.

\[\sum_{k=1}^{n} v_k = 0\]

Sign Convention for KVL

Correct application of KVL requires a consistent sign convention. The standard approach is:

● Choose a traversal direction for the loop (clockwise is conventional)
● For voltage sources: Entering the negative terminal and exiting the positive terminal constitutes a voltage rise (+V). The reverse constitutes a drop (−V).
● For resistors: Traversing in the direction of current flow produces a voltage drop (−IR). Traversing against current flow produces a rise (+IR).

The same physical circuit will yield the correct result regardless of which traversal direction is chosen, provided signs are applied consistently throughout.

Diagram: KVL Loop Walkthrough

KVL Example: Single Loop Circuit

Example — KVL in a Series Resistor Circuit

Consider a circuit with a 12V battery and three series resistors: \(R_1 = 2\Omega\), \(R_2 = 3\Omega\), \(R_3 = 1\Omega\).

First, determine the current using Ohm's Law:

\[I = \frac{V_{source}}{R_{total}} = \frac{12\text{V}}{2+3+1\;\Omega} = \frac{12\text{V}}{6\;\Omega} = 2\text{A}\]

Apply KVL starting at the battery's negative terminal, going clockwise:

\[+12\text{V} - (2\text{A})(2\;\Omega) - (2\text{A})(3\;\Omega) - (2\text{A})(1\;\Omega) = 0\]

\[+12\text{V} - 4\text{V} - 6\text{V} - 2\text{V} = 0 \quad \checkmark\]

The 12V supplied by the battery is entirely dissipated across the three resistors, confirming conservation of energy.

3.3 Circuit Topology

Circuit topology is the study of how components are interconnected, independent of component type or value. Topological analysis determines the number of independent equations required to fully solve a circuit.

Term	Definition
Node	A point where two or more components connect
Branch	A path containing a single component between two nodes
Loop	Any closed path through a circuit
Mesh	A loop that contains no other loops within it (a minimal loop)

The Topology Formula

The relationship between branches, nodes, and independent meshes is given by:

\[b = n - 1 + m\]

where \(b\) is the number of branches, \(n\) is the number of nodes, and \(m\) is the number of independent meshes. KCL yields \(n-1\) independent equations and KVL yields \(m\) independent equations.

Diagram: Circuit Topology Explorer

3.4 The Node Voltage Method

The node voltage method is a systematic procedure for circuit analysis that minimizes the number of unknowns by working with node voltages rather than individual branch currents. For a circuit with \(n\) nodes, this method requires \(n-1\) equations.

● Step 1: Select a reference node (ground) — typically the node with the most connections
● Step 2: Define voltages at all other nodes relative to the reference
● Step 3: Write KCL equations at each non-reference node
● Step 4: Solve the resulting system of equations

All branch currents can subsequently be derived from the solved node voltages using Ohm's Law.

The Reference Node

The reference node serves as the zero-potential point against which all other node voltages are measured. The assignment is arbitrary — it does not need to connect to physical earth ground. It is simply the datum point for voltage measurements within the circuit.

Reference Node Selection Guidelines

Choose the node with the greatest number of connections to minimize the number of required equations. If a ground symbol is present in the schematic, use that node. The negative terminal of a voltage source is often a convenient choice.

Node Voltage Example

Example — Two-Node Circuit

Consider a circuit with a 10V source, three nodes (A, B, and reference ground), and resistors connecting them.

Step 1: Label the reference node (ground = 0V)

Step 2: Define node voltages \(V_A\) and \(V_B\)

Step 3: Write KCL at each non-reference node:

At node A (assuming all currents leaving):

\[\frac{V_A - 10}{R_1} + \frac{V_A - V_B}{R_2} = 0\]

At node B:

\[\frac{V_B - V_A}{R_2} + \frac{V_B - 0}{R_3} = 0\]

Step 4: Solve the system for \(V_A\) and \(V_B\), then derive all branch currents using Ohm's Law.

The Supernode Technique

When a voltage source connects two non-reference nodes, the standard KCL equation cannot be written directly because the current through an ideal voltage source is unknown. The supernode technique resolves this situation.

● Enclose the voltage source and its two connected nodes within a single boundary
● Write a KCL equation for the entire supernode (total current entering = total current leaving)
● Add a constraint equation relating the two node voltages through the voltage source value

Diagram: Supernode Analysis

3.5 The Mesh Current Method

The mesh current method takes the complementary approach to node voltages. Instead of defining node voltages and deriving currents, this method assigns a circulating current to each mesh and writes KVL equations. For a circuit with \(m\) meshes, exactly \(m\) equations are required. This method is particularly efficient when the circuit has many nodes but few meshes.

● Step 1: Assign a mesh current to each mesh (conventionally all clockwise)
● Step 2: Write KVL equations around each mesh
● Step 3: Solve for the mesh currents
● Step 4: Derive branch currents and voltages as needed

Mesh Current Sign Convention

When two meshes share a branch, the actual branch current is determined by the combination of both mesh currents:

Situation	Branch Current
Only mesh 1 passes through branch	\(I_1\)
Meshes 1 and 2 share branch, same direction	\(I_1 + I_2\)
Meshes 1 and 2 share branch, opposite direction	\(I_1 - I_2\)

Mesh Analysis Example

Example — Two-Mesh Circuit

Define mesh currents \(I_1\) (left mesh, clockwise) and \(I_2\) (right mesh, clockwise).

Mesh 1 (left):

\[V_s - I_1 R_1 - (I_1 - I_2)R_2 = 0\]

Mesh 2 (right):

\[-(I_2 - I_1)R_2 - I_2 R_3 = 0\]

Rearranging into matrix form:

\[\begin{bmatrix} R_1 + R_2 & -R_2 \\ -R_2 & R_2 + R_3 \end{bmatrix} \begin{bmatrix} I_1 \\ I_2 \end{bmatrix} = \begin{bmatrix} V_s \\ 0 \end{bmatrix}\]

The resistance matrix is symmetric: the main diagonal contains the sum of resistances in each mesh, and the off-diagonal entries contain the negative of shared resistances.

The Supermesh Technique

When a current source is shared between two meshes, a standard KVL equation cannot be written for the branch containing the current source because the voltage across an ideal current source is unknown. The supermesh technique resolves this by:

● Combining the two meshes that share the current source into a single outer loop
● Writing KVL around the supermesh (excluding the current source branch)
● Adding a constraint equation relating the two mesh currents through the current source value

Diagram: Mesh vs. Supermesh Comparison

3.6 The Superposition Principle

The superposition principle provides a divide-and-conquer approach for circuits with multiple independent sources. In a linear circuit, the response at any point equals the algebraic sum of the responses caused by each source acting alone, with all other independent sources deactivated.

Deactivating sources means:

● Voltage sources → Replace with a short circuit (0V, wire)
● Current sources → Replace with an open circuit (0A, break)

Key Insight — Linearity Requirement: Superposition is valid because Ohm's Law is linear — voltage and current are proportional, and responses from multiple sources combine additively. This principle does not apply to circuits containing nonlinear elements such as diodes.

Superposition Example

Example — Two-Source Circuit

Consider a circuit with a 12V voltage source and a 2A current source. To find the current through resistor \(R\):

● Step 1: Deactivate the current source (open circuit). Solve for \(I_R'\) due to the voltage source alone.
● Step 2: Deactivate the voltage source (short circuit). Solve for \(I_R''\) due to the current source alone.
● Step 3: Combine: \(I_R = I_R' + I_R''\)

If the two contributions flow in opposite directions, algebraic addition accounts for the sign difference automatically.

Diagram: Superposition Principle Demonstrator

3.7 Load Resistance and Equivalent Resistance

Load resistance (\(R_L\)) is the resistance of the component or subsystem being powered by a circuit. The remainder of the circuit exists to deliver energy to this load.

Equivalent resistance (\(R_{eq}\)) reduces a complex resistor network to a single resistance value that draws the same current from the source as the original network.

Configuration	Formula
Series	\(R_{eq} = R_1 + R_2 + \cdots + R_n\)
Parallel	\(\frac{1}{R_{eq}} = \frac{1}{R_1} + \frac{1}{R_2} + \cdots + \frac{1}{R_n}\)
Mixed	Combine step by step using series and parallel rules

Some resistor configurations — notably bridge circuits — cannot be reduced using series and parallel rules alone. These require the delta-wye transformation described in the next section.

3.8 Delta and Wye Configurations

Two three-terminal resistor configurations frequently appear in circuit analysis:

● Delta configuration (Δ, also called pi π) — three resistors connected in a triangle, where each resistor directly connects two of the three terminals
● Wye configuration (Y, also called T) — three resistors that share a common central node, with each resistor extending to one of the three terminals

These two configurations can be made electrically equivalent — from the external terminals, they exhibit identical behavior despite having different internal structures.

Delta-to-Wye Transformation

Each wye resistor equals the product of the two adjacent delta resistors divided by the sum of all three delta resistors:

\[R_1 = \frac{R_a R_b}{R_a + R_b + R_c} \qquad R_2 = \frac{R_b R_c}{R_a + R_b + R_c} \qquad R_3 = \frac{R_a R_c}{R_a + R_b + R_c}\]

Wye-to-Delta Transformation

Each delta resistor equals the sum of all pairwise products of wye resistors divided by the opposite wye resistor:

\[R_a = \frac{R_1 R_2 + R_2 R_3 + R_1 R_3}{R_3} \qquad R_b = \frac{R_1 R_2 + R_2 R_3 + R_1 R_3}{R_1} \qquad R_c = \frac{R_1 R_2 + R_2 R_3 + R_1 R_3}{R_2}\]

Diagram: Delta-Wye Transformation Calculator

When to Use Delta-Wye Transformation

Delta-wye transformation is most applicable in these situations:

● Bridge circuits (such as the Wheatstone bridge) where a resistor cannot be classified as series or parallel
● Complex networks that resist simplification through series and parallel reduction alone
● Three-phase power systems encountered in later chapters

After performing the transformation, standard series and parallel reduction rules can be applied to complete the simplification.

3.9 Circuit Simplification

Circuit simplification reduces a complex circuit to its simplest equivalent form using a systematic strategy:

● Step 1: Identify series or parallel resistor groups
● Step 2: Combine them step by step using the appropriate formulas
● Step 3: Apply delta-wye transformation if no further series/parallel reductions are possible
● Step 4: Repeat until a single equivalent resistance remains

Technique	Formula
Series combination	\(R_{eq} = R_1 + R_2\)
Parallel combination	\(R_{eq} = \frac{R_1 R_2}{R_1 + R_2}\)
Delta-wye transformation	See Section 3.8
Source transformations	Covered in Chapter 4

Key Insight — Simplification Priority: Always attempt series and parallel reduction before resorting to delta-wye transformation. The simpler methods are less prone to computational error and should be exhausted first.

Diagram: Circuit Simplification Step-by-Step

3.10 Choosing an Analysis Method

With multiple analysis techniques available, the choice of method depends on the circuit characteristics:

Circuit Characteristic	Recommended Method
Few nodes, many meshes	Node Voltage Method
Few meshes, many nodes	Mesh Current Method
Multiple independent sources	Superposition (then either method)
Need only one current or voltage	Simplification + Ohm's Law
Bridge or complex topology	Delta-Wye transformation first
Voltage source between non-reference nodes	Supernode technique
Current source shared between meshes	Supermesh technique

Both the node voltage method and the mesh current method can solve any planar circuit. Select the method that produces fewer simultaneous equations based on the circuit's node and mesh count.

3.11 Systematic Analysis: The Matrix Approach

For larger circuits, organizing the system of equations into matrix form enables efficient computation. The two standard matrix formulations are:

Node voltage formulation with \(n-1\) unknowns:

\[\mathbf{G} \mathbf{V} = \mathbf{I}\]

where \(\mathbf{G}\) is the conductance matrix, \(\mathbf{V}\) is the node voltage vector, and \(\mathbf{I}\) is the source current vector.

Mesh current formulation with \(m\) unknowns:

\[\mathbf{R} \mathbf{I} = \mathbf{V}\]

where \(\mathbf{R}\) is the resistance matrix, \(\mathbf{I}\) is the mesh current vector, and \(\mathbf{V}\) is the source voltage vector.

Matrix Properties

For circuits containing only passive elements and independent sources, both matrices are symmetric (the matrix equals its transpose). Main diagonal entries are positive sums of connected conductances or resistances. Off-diagonal entries are the negatives of shared conductances or resistances.

Diagram: Matrix Equation Builder

Chapter Summary

This chapter covered the fundamental laws and systematic methods for analyzing any DC circuit. Kirchhoff's Current Law enforces conservation of charge at nodes, while Kirchhoff's Voltage Law enforces conservation of energy around loops. Circuit topology — nodes, branches, loops, and meshes — determines the structure of analysis equations. The node voltage method and mesh current method provide systematic procedures that work for any linear circuit, with supernodes and supermeshes handling special source configurations. The superposition principle decomposes multi-source circuits into single-source problems. Delta-wye transformations enable simplification of circuits that cannot be reduced by series and parallel rules alone.

Key Equations Reference

Concept	Equation
KCL	\(\sum i_k = 0\)
KVL	\(\sum v_k = 0\)
Topology	\(b = n - 1 + m\)
Delta→Wye	\(R_Y = \frac{R_{\Delta,adj1} \cdot R_{\Delta,adj2}}{\sum R_\Delta}\)
Wye→Delta	\(R_\Delta = \frac{\sum (R_Y \text{ products})}{R_{Y,opposite}}\)

What's Next

Chapter 4 introduces additional analysis tools: Thévenin and Norton equivalent circuits, source transformations, and the maximum power transfer theorem. These techniques enable further circuit simplification and address practical questions about optimal power delivery to loads.

Chapter 3 Review: Test Your Understanding

At a node with four wires, if currents of 3A, −5A, and 4A flow through three of them (positive = into node), what current flows through the fourth wire?
In a loop with a 9V battery and two resistors (3Ω and 6Ω), what is the current?
When should you use a supernode?
What is the difference between a loop and a mesh?
If a circuit has 4 nodes and 6 branches, how many independent meshes does it have?

Answers:

By KCL: 3 + (−5) + 4 + I₄ = 0, so I₄ = −2A (flows out of node)
I = V/(R₁+R₂) = 9V/9Ω = 1A
When a voltage source connects two non-reference nodes
A mesh is a loop that contains no other loops inside it (a minimal loop)
Using b = n − 1 + m: 6 = 4 − 1 + m, so m = 3 meshes