References: Unit 12 — Introduction to VHDL
- VHDL — Wikipedia — Comprehensive overview of the VHDL hardware description language including history, syntax, data types, concurrent and sequential statements, and applications in digital design.
- IEEE 1076 Standard — Wikipedia — Coverage of the IEEE standard for VHDL including revisions from VHDL-87 through VHDL-2019 and the evolution of language features.
- RTL (Register Transfer Level) — Wikipedia — Explanation of RTL abstraction for digital design, covering how VHDL descriptions at the RTL level map to synthesizable hardware structures.
- Digital Design (6th Edition) — M. Morris Mano, Michael D. Ciletti — Pearson — Chapters on VHDL cover entity declarations, architecture bodies, modeling styles, and synthesis-oriented design with practical examples.
- The Designer's Guide to VHDL (3rd Edition) — Peter J. Ashenden — Morgan Kaufmann — Definitive VHDL reference covering all language constructs, modeling styles, testbench development, and synthesis guidelines with extensive examples.
- Finite-state machine — Wikipedia — FSM theory and implementation, relevant to VHDL FSM coding patterns including enumerated state types, one-process and two-process styles.
- Logic synthesis — Wikipedia — Overview of how synthesis tools map HDL descriptions to gate-level netlists, including inference of combinational logic, registers, and memory elements.
- Latch (electronics) — Wikipedia — Coverage of latch behavior relevant to understanding unintended latch inference in VHDL when combinational processes lack complete signal assignments.
- VHDL for Engineers — Kenneth L. Short — Pearson — Practical VHDL textbook covering entity-architecture structure, signal assignment, process statements, component instantiation, and testbench design for engineering students.
- GHDL Open-Source VHDL Simulator — GHDL Project — Open-source VHDL analyzer, compiler, and simulator supporting IEEE 1076 standards, useful for learning and verifying VHDL designs without commercial tools.