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VHDL Synthesis Inference

Description

This simulation shows how VHDL synthesis tools infer hardware from code patterns. Select from six common code patterns to see the VHDL code alongside the hardware circuit that gets synthesized.

Learning Objectives

Bloom Level: Understand (L2)

  • Recognize which hardware structures are inferred from VHDL patterns
  • Match concurrent assignments to combinational logic
  • Identify process patterns that infer flip-flops and latches
  • Understand the difference between intended and unintended inference

How to Use

  1. Click a pattern button to select a VHDL code pattern
  2. View the VHDL code on the left side
  3. See the inferred hardware diagram on the right side
  4. Read the explanation of why that hardware is inferred
  5. Note the warning for unintended latch inference

References

  • Unit 12: VHDL - Synthesis and Hardware Inference